– Commercial –
Location: Bengaluru
Firm: Renesas Electronics
Key Accountabilities
- Transistor Stage design of quite a lot of Analog/Combined-Sign blocks corresponding to high-speed ADCs and DACs, Part-Locked-Loops, sign conditioning blocks like buffers, filters, variablegain amplifiers, in addition to LDO regulators, charge-pumps, bandgap and present references and so forth.
- Focus on block and system efficiency with System Engineers and develop sufficient circuit topologies and architectures to meet the system necessities.
- Carry out/supervise the chip floor-planning and format, post-layout extractions and verifications.
- Carry out/supervise silicon characterization, reliability analysis and the event of APIs for measurements.
- Put together and preserve venture documentation together with basic specification, circuit description, and measurement stories.
Key Attributes
- BTech/MTech/MS/PhD with 2-20 years of commercial expertise.
- Confirmed observe report of Analog/Combined-Sign blocks built-in circuit design in CMOS applied sciences with accomplished initiatives from structure to tape-out and silicon characterization.
- Expertise with Cadence Virtuoso and Spectre-RF is a should.
- Expertise with normal CMOS RF fashions and/or SOI/BiCMOS applied sciences. Deep understanding of machine modeling; provide isolations and circuit format for optimum efficiency.
- Good understanding of system specs and the power to work with system architects to translate system necessities into circuit necessities on the IC degree.
- Familiarity with system and behavioral modeling utilizing Matlab/Python, System Verilog, Verilog-A/AMS, is a plus.
- Palms-on expertise in mm-wave silicon characterization and debug. Data of Python or C (for check and evaluation scripting). Data of check parameters and check gear; oscilloscope, VNA, spectrum/sign analyzers, hands-on expertise in analog/Combined-Sign testing.
- Should possess good communication and presentation abilities and the need to be a part of a dynamic group.