Easy methods to Choose a Timer on PIC MCUs


Timers are a typical peripheral in microcontrollers (MCUs), together with PIC MCUs. With so many alternatives, how do you choose the precise one to make use of in your utility?

Exploring the Versatile World of Microcontroller (MCU) Timers: Purposes and Choice Information

Timers are a ubiquitous peripheral in MCUs. It ought to come as no shock that there are loads of timers, every with their very own use case that they excel at. Some timers are designed for use as a part of waveform era, whereas others are perfect for pulse counting. In lots of instances, there isn’t any fallacious alternative—as an alternative, it is going to rely upon the necessities and assets out there. For extra details about the timers, please see the linked peripheral pages within the desk under.

2*{Hardware} restrict refers back to the capacity to rollover at an arbitrary worth, quite than the utmost rely doable. (E.g.: 0x1000 versus 0xFFFF for a 16-bit timer)

Timer 0 (TMR0)

TMR0 can perform in 8-bit or 16-bit mode. When in 8-bit mode, the excessive and low byte of the timer are unbiased of one another. The timer rolls over when the worth set within the excessive byte matches the low byte. 16-bit mode is a free working timer, the place the timer will rollover when it reaches the worth 0xFFFF. To forestall knowledge corruption throughout learn/writes, the register is buffered, and solely latched on the low byte.

Timer 1/3/5/… (TMR1)

TMR1 is a 16-bit gated timer with assist for each synchronous and asynchronous clock alerts. When TMR1 is in asynchronous mode, the timer capabilities in sleep and may generate an interrupt to wake the microcontroller. The timer additionally comprises a gating perform which can be utilized to carry the present worth.  To forestall corruption when studying/writing the 16-bit worth, the timer will be configured to buffer the counter. The information might be latched on the low byte.

Timer 2/4/6/… (TMR2)

TMR2 is an 8-bit timer that helps one-shot and monostable modes of operation. One-shot mode triggers the timer, then clears the ON bit after reaching the {hardware} restrict. Monostable capabilities identically to the one-shot mode, besides that the ON bit stays set and the timer will be retriggered. TMR2 will be reset or triggered by an exterior sign.

Sign Measurement Timer (SMT)

The SMT is a big 24-bit timer that helps the next modes:

  • (Windowed/Gated) Counter
  • Seize
  • Time of Flight
  • (Gated) Window Measurement
  • Excessive and Low Measurement
  • Interval and Responsibility Cycle Measurement
  • (Gated) Timer

Be aware: Values in parentheses are different modes out there, e.g.: Windowed Counter, Gated Counter and Counter are all legitimate modes.

To assist these working modes, the SMT comprises 4 24-bit registers. The precise habits of the registers is dependent upon the mode.

Common Timer (UTMR)

The UTMR consists of two timer modules that may function independently of one another, or as one bigger timer. The scale of the UTMR might range by system; at the moment on the PIC18-Q71 household, it’s 16-bit per module, or 32-bits if chained collectively. This timer was designed to include the functionalities of all legacy timers (TMR0, TMR1 and TMR2).

The UTMR helps each synchronous and non-synchronous clock sources and permits for studying the present rely with out stopping the timer, even with non-synchronous sources. To manage the timer, there are three configurable occasions: Begin, Reset and Cease.

Begin occasions outline what begins the timer. The reset occasion defines what resets the rely again to zero. And there’s a cease occasion, which defines what’s going to cease the timer utterly. These occasions will be all the time enabled, triggered from an enter sign or disabled solely. This allows options like monostable triggering, {hardware} limits and one-shot operation.

Numerically Managed Oscillator (NCO)

Be aware: The scale of the NCO (16-bits or 20-bits) might range, relying on system household.

The NCO is designed to generate a periodic waveform by including a programmable increment to an accrued whole. When the entire overflows, the overflow is stored, and a pulse is generated. The heartbeat is usually a mounted variety of enter clock cycles in width, or it may be 50% output at the price of halving the output frequency. Whereas the NCO isn’t designed for measurement, it may be used if the NCO is stopped, learn after which restarted.

Seize/Examine/PWM (CCP)

The CCP has three modes—Seize, Examine or Pulse Width Modulation (PWM). The Seize/Examine modes make the most of TMR1 whereas PWM makes use of TMR2.

The Seize mode shops the worth in TMR1 when a rising or falling occasion happens (relying on working mode). The Examine mode generates an output when the worth in TMR1 matches the set worth within the CCP. For PWM mode, TMR2 is 8-bit, however the CCP extends it to 10-bit utilizing the inner oscillator’s prescaler bits.

PWM

Be aware: For PWM that is dependent upon TMR2, see the CCP part.

The 16-bit PWM peripheral is absolutely standalone—that means that it doesn’t make the most of one other system timer, in contrast to CCP (which is dependent upon TMR2). There are 5 working modes for producing PWM:

  • Left Aligned
  • Proper Aligned
  • Middle-Aligned
  • Variable Aligned
  • Examine

These modes change how the rely is used to generate the output. Inside of every occasion are slices, every containing two outputs. The outputs share a typical frequency however have their very own obligation cycle registers. Moreover, the peripheral is double buffered for clean output adjustments and will be synchronized with different PWM situations.

Watchdog Timer (WDT)/Windowed Watchdog Timer (WWDT)

The WWDT is a particular timer designed to detect a impasse within the microcontroller. A WWDT is a timer that runs the background. Periodically, software program should clear it by a particular sequence, or it is going to reset the microcontroller. WDT and WWDT differ solely in that the WWDT has a “Window” characteristic. The “Window” characteristic can require the clearing sequence to be carried out inside a sure time window, quite than any time earlier than the timer rolls over. This prevents a impasse from being undetected by clearing the timer constantly.

Choosing the Timer and Studying Extra

After understanding the timer peripherals, choose which timer closest matches the options wanted within the utility. In lots of instances, there are a number of doable timers that may carry out the duty. On this case, choose the only timer—this leaves timers with extra capabilities out there for future use. The system datasheet, utility notes and technical briefs go into extra element on how all of those timers function and the registers related to them. Code examples that use a particular timer will be discovered by looking MPLAB Uncover.

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